Author(s): Wang, RT (Wang, Ruiting); Wang, PF (Wang, Pengfei); Lyu, C (Lyu, Chen); Luo, GZ (Luo, Guangzhen); Yu, HY (Yu, Hongyan); Zhou, XL (Zhou, Xuliang); Zhang, YJ (Zhang, Yejin); Pan, JQ (Pan, Jiaoqing)

Source: PHOTONICS Volume: 9 Issue: 6 Article Number: 384 DOI: 10.3390/photonics9060384 Published: JUN 2022

Abstract: Photonic neural network chips have been widely studied because of their low power consumption, high speed and large bandwidth. Using amplitude and phase to encode, photonic chips can accelerate complex-valued neural network computations. In this article, a photonic complex-valued neural network (PCNN) chip is designed. The scale of the single-core PCNN chip is limited because of optical losses, and the multicore architecture of the chip is used to improve computing capability. Further, for improving the performance of the PCNN, we propose the transformation layer, which can be implemented by the designed photonic chip to transform real-valued encoding to complex-valued encoding, which has richer information. Compared with real-valued input, the transformation layer can effectively improve the classification accuracy from 93.14% to 97.51% of a 64-dimensional input on the MNIST test set. Finally, we analyze the multicore computation of the PCNN. Compared with the single-core architecture, the multicore architecture can improve the classification accuracy by implementing larger neural networks and has better phase noise robustness. The proposed architecture and algorithms are beneficial to promote the accelerated computing of photonic chips for complex-valued neural networks and are promising for use in many applications, such as image recognition and signal processing.

Accession Number: WOS:000816348800001

eISSN: 2304-6732

Full Text: https://www.mdpi.com/2304-6732/9/6/384