Author(s): He, Z (He, Zhen); Shi, C (Shi, Cong); Wang, TX (Wang, Tengxiao); Wang, Y (Wang, Ying); Tian, M (Tian, Min); Zhou, XC (Zhou, Xichuan); Li, P (Li, Ping); Liu, LY (Liu, Liyuan); Wu, NJ (Wu, Nanjian); Luo, G (Luo, Gang)

Source: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS Volume: 69 Issue: 3 Pages: 1657-1661 DOI: 10.1109/TCSII.2021.3117699 Published: MAR 2022

Abstract: For embedded, mobile and edge-computing intelligent applications, this brief proposes a low-cost real-time neuromorphic hardware system of spiking Extreme Learning Machine (ELM) equipped with on-chip triplet-based reward-modulated spike-timing-dependent plasticity (R-STDP) learning capability. Our design employs a time-step pipelined dual-core architecture consisting of parallel computing unit arrays to improve processing speed, as well as a trace-assisting learning mechanism and on-the-fly hidden layer weight re-generators to significantly reduce hardware resource costs. Our architecture is scalable to different spiking ELM sizes under different tradeoffs among processing speed, recognition accuracy and resource costs. Tests showed that the on-chip triplet R-STDP learning capability can help to achieve relatively high recognition accuracies on our hardware system. An FPGA prototype with low logic and memory resource consumption was implemented, achieving 93% and 78.5% recognition accuracies on the MNIST and Fashion-MNIST image datasets, respectively, at a speed of 30 frames per second (fps) for inference and 22.5 fps for on-chip learning.

Accession Number: WOS:000770045800202

Author Identifiers:

Author        Web of Science ResearcherID        ORCID Number

Wang, Ying                  0000-0001-5172-4736

ISSN: 1549-7747

eISSN: 1558-3791

Full Text: https://ieeexplore.ieee.org/document/9559400