Author(s): Zhao, SS (Zhao, S. S.); Gao, LC (Gao, L. C.); Li, XJ (Li, X. J.); Zhang, HY (Zhang, H. Y.); Ni, T (Ni, T.); Wang, JJ (Wang, J. J.); Gao, JT (Gao, J. T.); Bu, JH (Bu, J. H.); Li, DL (Li, D. L.); Yan, WW (Yan, W. W.); Zeng, CB (Zeng, C. B.); Wang, ZJ (Wang, Z. J.); Zhao, FZ (Zhao, F. Z.); Luo, JJ (Luo, J. J.); Han, ZS (Han, Z. S.)

Source: JOURNAL OF PHYSICS D-APPLIED PHYSICS Volume: 55 Issue: 22 Article Number: 225104 DOI: 10.1088/1361-6463/ac569b Published: JUN 2 2022

Abstract: Partially depleted silicon-on-insulator (PDSOI) MOSFETs are widely used in 225 degrees C high-temperature electronic system applications with integrated circuits. But the process node stays at 0.5 mu m for a long time and no further breakthrough can be achieved. This paper reports the high-temperature characteristics of 28 nm ultra-thin body and box fully depleted SOI (FDSOI) CMOS transistors with low threshold voltage (LVT) structure. Experimental results demonstrate that V-t shift changes with temperature as low as 0.59 mV degrees C-1, the subthreshold slope (SS) is 145.35 mV dec(-1) at 300 degrees C, and the related parameters are optimized by 3.7 times and 2.2 times respectively compared with 0.13 mu m PDSOI. Combined with theoretical analysis, it is proved that the ultra-body FDSOI has an LVT drift rate and better SS than 0.13 mu m PDSOI at high temperature. The advantage of this performance is mainly due to the difference between alpha(VT)alpha(VT) and beta(VT) coefficients related to the back gate effect. Under negative back-gate bias, the I-on/l(off) ratio can be increased by two orders of magnitude without affecting V-t shift changes with temperature, this proves that the FDSOI is capable of high-temperature applications above 300 degrees C. This paper provides substantial support for future high-temperature system integrated circuits from the micro-scale to the nano-scale.

Accession Number: WOS:000765538400001

ISSN: 0022-3727

eISSN: 1361-6463

Full Text: https://iopscience.iop.org/article/10.1088/1361-6463/ac569b