Author(s): Wang, L (Wang, Lin); Cheng, Z (Cheng, Zhe); Yu, ZG (Yu, Zhi-Guo); Lin, DF (Lin, De-Feng); Liu, Z (Liu, Zhe); Jia, LF (Jia, Li-Fang); Zhang, Y (Zhang, Yun)

Source: APPLIED SCIENCES-BASEL Volume: 11 Issue: 15 Article Number: 7057 DOI: 10.3390/app11157057 Published: AUG 2021

Abstract: Featured Application This study allows power converters to achieve high conversion efficiency due to the low parasitic inductance of multi-chip integration technology. Half-bridge modules with integrated GaN high electron mobility transistors (HEMTs) and driver dies were designed and fabricated in this research. Our design uses flip-chip technology for fabrication, instead of more generally applied wire bonding, to reduce parasitic inductance in both the driver-gate and drain-source loops. Modules were prepared using both methods and the double-pulse test was applied to evaluate and compare their switching characteristics. The gate voltage (V-gs) waveform of the flip-chip module showed no overshoot during the turn-on period, and a small oscillation during the turn-off period. The probabilities of gate damage and false turn-on were greatly reduced. The inductance in the drain-source loop of the module was measured to be 3.4 nH. The rise and fall times of the drain voltage (V-ds) were 12.9 and 5.8 ns, respectively, with an overshoot of only 4.8 V during the turn-off period under V-dc = 100 V. These results indicate that the use of flip-chip technology along with the integration of GaN HEMTs with driver dies can effectively reduce the parasitic inductance and improve the switching performance of GaN half-bridge modules compared to wire bonding.

Accession Number: WOS:000681926400001

eISSN: 2076-3417

Full Text: https://www.mdpi.com/2076-3417/11/15/7057