Hybrid-gate structure designed for high-performance normally-off p-GaN high-electron-mobility transistor
Author(s): Niu, D (Niu, Di); Wang, Q (Wang, Quan); Li, W (Li, Wei); Chen, CX (Chen, Changxi); Xu, JK (Xu, Jiankai); Jiang, LJ (Jiang, Lijuan); Feng, C (Feng, Chun); Xiao, HL (Xiao, Hongling); Wang, Q (Wang, Qian); Xu, XG (Xu, Xiangang); Wang, XL (Wang, Xiaoliang)
Source: JAPANESE JOURNAL OF APPLIED PHYSICS Volume: 59 Issue: 11 Article Number: 111001 Published: NOV 1 2020
Abstract: A normally-off hybrid-gate p-GaN high-electron-mobility transistor (HEMT) is presented in this paper. The gate region is designed as a parallel connection between the Schottky-gate and the metal-insulator-semiconductor gate by inserting a dielectric layer under part of the gate metal. Compared to the conventional Schottky-gate p-GaN HEMT, the fabricated hybrid-gate p-GaN HEMT showed a higher threshold voltage of 3.2 V (increases by 167%), and the maximum transconductance is only a slight decrease (reduces by 23%). At the same time, the forward gate leakage current of the hybrid-gate structure is smaller. Furthermore, through simulation, we revealed that the increase in the threshold voltage originated from the delayed full opening of the two-dimensional electron gas. And we also find that the parameters of the gate dielectric layer have a great influence on the performance of the device. The results show that the hybrid-gate structure is a more promising device structure.
Accession Number: WOS:000578365800001
ISSN: 0021-4922
eISSN: 1347-4065
Full Text: https://iopscience.iop.org/article/10.35848/1347-4065/abbe67