刘岳阳，博士，研究员，博士生导师，国家级青年人才。

2012和2017年在湖南大学获得学士和博士学位，2017年获博新计划资助，进入中国科学院半导体研究所从事博士后研究，2019至2020年在美国劳伦斯伯克利国家实验室进行访学研究，2020年加入中国科学院半导体研究所工作，2022年入选中国科学院高层次人才计划，2025年入选国家高层次人才计划。

主要科研方向

（1）半导体器件原子级精度模拟

（2）晶体管可靠性物理与设计

（3）半导体材料、界面与缺陷计算

主要学术成就：

长期从事半导体器件可靠性物理研究和原子级精度模拟：针对FinFET、GAAFET等先进晶体管器件以及新兴二维半导体器件等，开发了一套原子级精度可靠性模拟软件MARS（Multiscale Ab initio Reliability Simulator），从最底层揭示了偏压温度不稳定性、热载流子退化、低温涨落等可靠性问题微观机理，并在原子层面设计了多种可靠性改进策略。以第一作者或通讯作者身份发表论文30余篇，包括集成电路领域国际顶会IEDM论文4篇，VLSI论文1篇，权威期刊PRB、PR Applied 论文5篇，Advanced Materials 论文2篇，Applied Physics Letters、IEEE TED等论文多篇，申请专利5项。

部分在研项目：

（1）国家重点研发计划项目，课题负责人，2024-2029，

（2）国家自然科学基金面上项目，项目负责人，2022-2025

（3）企业横向项目，项目负责人，2024-2025

（4）中国科学院高层次人才项目，项目负责人,2023-2025

联系方式：

E-mail: yueyangliu@semi.ac.cn

代表性论文或著作：

[1]Zuoyuan Dong#,Zirui Wang#,Hongbo Wang,Xiaomei Li,Chen Luo,Jialu Huang,Lan Li,Zepeng Huang,Zixuan Sun, Yue-Yang Liu*,Xing Wu*,Runsheng Wang*,“Towards Understanding Cryogenic Reliability in FinFETs under Hot Carrier Stress: New Findings on Ge Migration,and Impacts of Tail States Evolution”,Symposium on VLSI Technology and Circuits (2025).

[2]Yue-Yang Liu, Haoran Lu,Zirui Wang,Lang Zeng,Hui-Xiong Deng,Zhongming Wei,Lin-Wang Wang,Jun-Wei Luo,and Runsheng Wang,“Strain- and dipole-induced interface states in gate-all-around transistors: Properties and implications for application”,Phys. Rev. Applied 23,034020 (2025).

[3]Zirui Wang,Haoran Wang,Wen-Feng Li,Yuxiao Wang,Zixuan Sun,Anyi Zhu,Lang Zeng*,Yue-Yang Liu*,Lining Zhang*,Runsheng Wang*,and Ru Huang,"Investigation on the Band Tail States in FinFETs at Cryogenic Temperature,"in IEEE Transactions on Electron Devices 72,2670-2676 (2025).

[4]Wen-Feng Li,Ting-Wei Liu,Zheng-Mei Yang,Lin-Wang Wang,and Yue-Yang Liu*, “Atomic Level Insight into the Variation and Tunability of Band Alignment between Si and Amorphous SiO2/HfO2”,Chinese Physics Letters 42,017302 (2025).

[5]Ting-Wei Liu,Zhe Zhao,Ruyue Cao,Yue-Yang Liu*,Xiangwei Jiang,“Reliability challenges of gate dielectric materials in transistors”,Inf. Funct. Mater. 2,62–92 (2025)

[6]Yue-Yang Liu*,Guang-Hua Xu,Tao Xiong,Wen-Feng Li,Yu Zhao,Ting-Wei Liu,Zirui Wang,Runsheng Wang,Lin-Wang Wang,and Xiangwei Jiang*,“MARS: a Multiscale Ab initio Reliability Simulator for Advanced Si and 2D Material Based MOSFETs”,International Electron Devices Meeting (IEDM),pp. 1-4 (2024). 10.1109/IEDM50854.2024.10873591

[7]Zirui Wang,Haoran Wang,Wen-Feng Li,Yuxiao Wang,Zixuan Sun,Anyi Zhu,Lang Zeng*,Yue-Yang Liu*,Runsheng Wang*,and Ru Huang,“Towards Understanding the Dynamic Variation in FinFET at Cryogenic Temperature: New Observations and Physical Modeling”,International Electron Devices Meeting (IEDM),pp. 1-4 (2024).

[8]Yu Zhao,Tao Xiong,Yue-Yang Liu*, and Xiangwei Jiang,“Reliability Improvement of 2-D WSe2 FETs by Regulating Charge Trapping: An Ab Initio Demonstration”,IEEE Transactions on Electron Devices,71,pp. 6410-6416 (2024).

[9]Zirui Wang,Haoran Lu,Zixuan Sun,Cong Shen,Baokang Peng,Wen-Feng Li,Yongkang Xue,Da Wang,Zhigang Ji,Lining Zhang,Yue-Yang Liu*,Xiangwei Jiang,Runsheng Wang⁺,Ru Huang,“New Insights into the Interface Trap Generation during Hot Carrier Degradation: Impacts of Full-band Electronic Resonance,(100) vs (110),and nMOS vs pMOS”,International Electron Devices Meeting (IEDM),pp. 1-4 (2023).

[10]Wanying Li,Yimeng Guo,Zhaoping Luo,Shuhao Wu,Bo Han,Weijin Hu,Lu You,Kenji Watanabe,Takashi Taniguchi,Thomas Alava,Jiezhi Chen,Peng Gao,Xiuyan Li,Zhongming Wei,Lin-Wang Wang,Yue-Yang Liu*,Chengxin Zhao*,Xuepeng Zhan*,Zheng Vitto Han*,and Hanwen Wang*,“A Gate Programmable van der Waals Metal-Ferroelectric-Semiconductor Vertical Heterojunction Memory”,Adv. Mater. 35,2208266 (2023).

[11]Xingang Wang,Tao Xiong,Kai Zhao,Ziqi Zhou,Kaiyao Xin,Hui-Xiong Deng,Jun Kang,Juehan Yang,Yue-Yang Liu*, and Zhongming Wei*,“Polarimetric Image Sensor and Fermi Level Shifting Induced Multichannel Transition Based on 2D PdPS”,Adv. Mater. 34,2107206 (2022).

[12]Tao Xiong,Xiuming Dou,Wen-Feng Li,Hongyu Wen,Hui-Xiong Deng,Yue-Yang Liu*,“Carrier injection induced degradation of nitrogen passivated SiC–SiO2 interface simulated by time-dependent density functional theory”,J. Appl. Phys. 135,105701 (2024).

[13]Tao Xiong,Juehan Yang,Hui-Xiong Deng,Zhongming Wei,and Yue-Yang Liu*,“The mechanism of improving germanium metal–oxide–semiconductor field-effect transistors’reliability by high-k dielectric and yttrium-doping: From the view of charge trapping”, J. Appl. Phys. 132,174506 (2022).

[14]Hao Liu,Pan Wang,Yixin Zong,Hongyu Wen*,Yue-Yang Liu*,and Jianbai Xia,“Giant tunnel magnetoresistance in two-dimensional van der Waals magnetic tunnel junctions: Ag/CrI3/MoSi2N4/CrI3/Ag”,Phys. Rev. B 106,104429 (2022).

[15]Haodong Hu,Ze Feng,Yibo Wang,Yan Liu,Hong Dong*,Yue-Yang Liu*,Yue Hao,and Genquan Han*,“The role of surface pretreatment by low temperature O2 gas annealing for β-Ga2O3 Schottky barrier diodes”,Appl. Phys. Lett. 120,073501 (2022).

[16]Xiaolei Ma^#,Yue-Yang Liu^#,Lang Zeng,Jiezhi Chen,* Runsheng Wang,* Lin-Wang Wang,Yanqing Wu,and Xiangwei Jiang*,“Defects Induced Charge Trapping/Detrapping and Hysteresis Phenomenon in MoS2 Field-Effect Transistors: Mechanism Revealed by Anharmonic Marcus Charge Transfer Theory”,ACS Appl. Mater. Interfaces 14,2185-2193 (2022).

[17]Yue-Yang Liu, Zhongming Wei,Sheng Meng*,Runsheng Wang,Xiangwei Jiang*,Ru Huang,Shu-Shen Li,and Lin-Wang Wang*,“Electronically induced defect creation at semiconductor/oxide interface revealed by time-dependent density functional theory”,Phys. Rev. B 104,115310 (2021).

[18]Yue-Yang Liu, Feilong Liu,Runsheng Wang*,Jun-Wei Luo*,Xiangwei Jiang*,Ru Huang,Shu-Shen Li and Lin-Wang Wang*,“Characterizing the charge trapping across crystalline and amorphous Si/SiO₂/HfO₂ stacks from first principle calculations”, Phys. Rev. Appl. 12,064012 (2019).

[19] Yue-Yang Liu,Fan Zheng,Xiangwei Jiang*,Jun-Wei Luo,Shu-Shen Li,and Lin-Wang Wang*,“Ab initio investigation of charge trapping across the crystalline-Si - amorphous-SiO₂ interface”, Phys. Rev. Appl. 11,044058 (2019).

[20] Yue-Yang Liu,and Xiangwei Jiang*,“Physics of hole trapping process in high-k gate stacks: A direct simulation formalism for the whole interface system combining density-functional theory and Marcus theory”,in 2018 IEEE International Electron Devices Meeting (IEDM),pp. 922–925.